 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| TELEFUNKEN Semiconductors ANT017 Semiconductors for TV Tuners - The New EasyLink Concept Issue: 12. 95 ANT017 Table of Contents TELEFUNKEN Semiconductors Introduction ..................................................................................................................................................................1 The MOSMIC Preamplifier.........................................................................................................................................2 Overview ....................................................................................................................................................................2 Advantages of a MOSMIC Preamplifier....................................................................................................................2 Differences between MOSMICs and MOSFETs .......................................................................................................3 The TV Mixer Families ................................................................................................................................................4 Overview ....................................................................................................................................................................4 Mixer IC Selection Guide ..........................................................................................................................................4 The Different Mixer Circuitries...........................................................................................................................4 The SAW Driver .................................................................................................................................................4 The LO Output ....................................................................................................................................................5 Influence of the Supply Voltage..........................................................................................................................5 Examples of Mixer Applications................................................................................................................................5 Connection to the Bandpass Filter.......................................................................................................................5 The Different Oscillator Circuits.........................................................................................................................5 No LO Output......................................................................................................................................................7 PLLs for a TV Tuner....................................................................................................................................................8 Overview ....................................................................................................................................................................8 Controlling the PLL ...................................................................................................................................................8 Application Hints .......................................................................................................................................................8 The Loop Filter....................................................................................................................................................8 Damping Factor and Loop Frequency.................................................................................................................9 Avoiding Disturbances ......................................................................................................................................10 The New EasyLink Concept ......................................................................................................................................11 Definition .................................................................................................................................................................11 Examples ..................................................................................................................................................................11 3-Mixer IC and MOSMICs ...............................................................................................................................11 Non-Self-Oscillating PLL .................................................................................................................................11 Appendix......................................................................................................................................................................13 Measurement of Tuner Parameters...........................................................................................................................13 Quality Factor of Resonant Circuits ..................................................................................................................13 Voltage Levels and Load Impedance ................................................................................................................13 Cascaded Noise and Intermodulation ................................................................................................................14 Level Diagram of a Tuner .................................................................................................................................14 Measurement of Mixer Parameters ..........................................................................................................................16 Tuning Steepness of the VCO ...........................................................................................................................16 Quality Factor of Oscillator Circuits .................................................................................................................17 Measurement of PLL Parameters .............................................................................................................................17 Loop Constants and Settling Time ....................................................................................................................17 Sensitivity..........................................................................................................................................................18 Utilities.....................................................................................................................................................................19 Literature ...........................................................................................................................................................19 CAD Tools for PCs ...........................................................................................................................................19 List of Abbreviations and Expressions Used.....................................................................................................20 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 the data sheet, hints how to simplify the development of a TV tuner and references to known weak points of applications. The chapters may be read separately. They contain all necessary information. References to other chapters are marked by notes (see Appendix"). The chapter The New EasyLink Concept" introduces a new concept of controlling the tuner by the PLL, the socalled EasyLink Concept. The appendix contains a description of measurement and design procedures. The respective results are used and given below. Basic literature, CAD tools and a list of the abbreviations used are given at the end. Introduction This application note describes semiconductor components TEMIC produces for TV- and VCR tuners. The various product groups are presented in the following three chapters. * * * The new MOSMIC families replacing the MOSFET prestages The TV mixer families The PLL families The term FAMILY is used for a group of components with similar pinning or functional content. Each of the main chapters mentioned above contains a short overview, followed by information not given by Issue: 12. 95 1 ANT017 The MOSMIC Preamplifier Overview The first generation of TEMIC MOSMICs1 (MOS Monolithic Integrated Circuits) with a transconductance of 24 mS can be thought of as a BF998 MOSFET surrounded by some special components. These fulfill the following tasks: * * * Biasing the MOSMIC Shifting the pinch-off voltage Keeping the drain current to a nearly constant level when reducing the gain TELEFUNKEN Semiconductors Advantages of a MOSMIC Preamplifier AGC VS O/P I/P Figure 1. MOSFET preamplifier Figure 1 shows the circuitry of a conventional preamplifier using a MOSFET. The four resistors are necessary for biasing the circuit. As the MOSFET is of the depletion-type, the source resistor is used to limit the current. The capacitor in parallel to it acts as a RF ground to keep the gain high. Though this new device is an IC, its handling and features are comparable to the BF998. Exceptions are: * * * It is not allowed to change the biasing Gate 2 is used only for AGC purposes The maximum G2 voltage is lower compared to a MOSFET. AGC VS O/P Table 1. The MOSMIC families Type VS 12 V 9V 5V 12 V 9V 5V 12 V 5V F/ dB @ 800 MHz S849T S913T S594T S886T S949T S595T S918T S593T 1.3 1.3 1.3 1.4 1.4 1.4 1.5 1.5 Y/ mS @ 200 MHz 24 24 24 30 30 30 40 40 Figure 2. MOSMIC preamplifier Figure 2 shows a preamplifier using a MOSMIC. A comparison with the old concept shows that all five external components mentioned above have been eliminated. This offers an advantage in cost and PCB space (which is doubled or tripled for a tuner with separate RF branches for VHF and UHF). The second advantage is the different way to activate a preamplifier stage. Part of the MOSMIC device is a power-down circuit. The MOSMIC is switched off, if the G1 voltage is changed to a level below 1 V, by connecting a resistor to ground. Compared to the standard method with a MOSFET (switching off the drain voltage), the isolation between input and output is improved significantly. This feature reduces antenna radiation and increases the decoupling from the antenna to the IF part. A more detailed description of the switching method is given in the chapter The New EasyLink Concept". I/P Table 1 lists the families available at the moment. As the biasing is fixed by the internal circuit, adapted types are necessary for different supply voltages. More families, e.g., with a different transconductance or for higher frequencies, are under development. 2 Issue: 12. 95 TELEFUNKEN Semiconductors The internal control circuit of the MOSMIC keeps the drain current on a nearly constant level when reducing the gain by means of the G2 voltage. This new feature improves the large-signal behavior (intermodulation and cross modulation). Figure 3 shows the difference between a conventional MOSFET preamplifier and the MOSMIC. The measurements were performed in the test fixture with 50- impedance. ANT017 Now two differences have to be considered: * The maximum allowed G2 voltage is lower. This problem may be solved by a voltage divider near the MOSMIC. As the AGC voltage of most of the TV tuners is delivered by the IF circuit, we recommend the adjustment of a few corresponding resistors in the IF part. The slope of the AGC curve is higher. Figure 4 shows a comparison. This is an inherent feature of the MOSMIC, which might influence the stability of the AGC loop in a negative way, depending on the prior layout with the MOSFET. Only slight changes in the IF part have to be made in order to solve potential problems. 0 -5 0 -5 Gain Reduction (dB) -10 -15 -20 -25 * -30 P_out (dBm) -10 -15 -20 BF998 S886T -25 -30 Figure 3. Intermodulation versus gain reduction Reference for both is an ideal gain-controlled amplifier. It can be intended as a constant gain amplifier with an attenuator in front of the input. Thus, the possible output voltage for a certain intermodulation distortion is constant for all gain values. Figure 3 shows this output voltage versus the gain reduction for an IM3 distortion of -50 dBc. The curve for the "reference" amplifier would be a horizontal line. Neither amplifier achieves the ideal curve of the reference amplifier. The MOSMIC, however, delivers about 3 dB more output power for a given IM3. For a comparable output, this gives a performance increase of 6 dB for IM3 distortions. TEMIC is prepared to give direct support for these modifications. The new generation of IF amplifiers, for example, allows a negative dynamic feedback. In practice, these problems can be observed only in the case of receiving standard L/ L' signals. Ug2 (V) -1 0 1 2 3 4 5 6 0 -5 -10 -20 -25 BF998 S886T -30 -35 -40 Figure 4. Comparison of gain control Differences between MOSMICs and MOSFETs If a MOSFET (e.g., the BF998) is replaced by a MOSMIC, the proceeding is easy. Dependent on the supply voltage, the appropriate type is chosen. The parts mentioned above (four resistors and one capacitor) have to be removed. The source resistor must be replaced by a short circuit. Replacing MOSFETs following advantages: * * * * * by MOSMICs offers Fewer external components Less space required on the PCB Better intermodulation performance Low power band switching Higher reverse isolation when turned off Issue: 12. 95 Pout(dB) the 3 -15 ANT017 The TV Mixer Families Overview TEMIC actually produces two families of TV mixers, the U2300B and the U2321B. Their main 12-V types are listed in table 2. New types and families, e.g., mixers in SSO packages, are still under development. The column "Remarks" refers to other types. * * `M' indicates a pin-mirrored type `9' indicates a version with 9-V supply voltage TELEFUNKEN Semiconductors IF O/P Osc. RF I/P Table 2. TV mixers Type U2300B U2320B U2321B Package No. of SAW Mixers Driver SO28 SO20 SO16 3 2 2 Yes Yes No LOO/P Yes No Yes Remarks 9 M, 9 9 Figure 5. Common-emitter mixer IF O/P The main differences between the two families: * * Pinning Input impedance of the mixers Osc. Mixer IC Selection Guide It is often necessary to replace a mixer in a finished design. Package dimensions and pinning of the U2300B mixer family are nearly the same or even compatible with various IC types from other suppliers. The following sections explain technical upgrades of TEMIC products. RF I/P Figure 6. Common-base mixer quencies. This input must be driven symmetrically. By this load, the bandpass filter in front of the mixer input is neither de-tuned nor is its tuning-range reduced. The signal voltage across the tuning diodes of the bandpass filter is also reduced by the low-resistive load, thus minimizing intermodulation distortion. As mentioned earlier, all mixer cells are of this type, despite the VHF part of the U2300B family. The Different Mixer Circuitries All TEMIC TV mixer ICs have implemented Gilbert mixer cells. The input may be either a common-emitter or a common-base amplifier. The common-emitter input shown in figure 5 has a high input impedance. It is resistive at low frequencies, but behaves as a capacitive half-plane for higher frequencies. This configuration has the advantage that the input may be driven asymmetrically. By designing it to the necessary tight coupling, the bandpass filter in front of the mixer input is de-tuned. Therefore, its tuning range is reduced considerably. The VHF mixer cell of the U2300B family is of this type. The common-base input shown in figure 6 has a low input impedance which is resistive at low frequencies and turns into the inductive half-plane for higher fre- The SAW Driver The SAW driver contained in the mixers of the U2300B family is suited to drive directly a symmetrical SAW filter. The high losses of the filter of up to 30 dB (related to the picture carrier) are compensated. The very low output impedance of the driver suppresses the so-called triple-transient response. Some tuner applications, however, need a different IF output connector, e.g., an asymmetrical one with an impedance of 75 . In this case, a discrete transistor stage should be taken into consideration. 4 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 configuration. To improve the tracking and the shape of the bandpass filter, tuned coupling is also possible by adding one varicap diode and resistors. The common-base mixer is the better solution with regard to RF aspects. However, there is also the stringent necessity for a symmetrical input. There are two ways to connect an asymmetrical bandpass filter to a symmetrical mixer input: * * Simple mutual coupling A more sophisticated circuit including coils for impedance transformation The LO Output For a PLL-controlled tuner, the simplest method is to use a mixer with a local oscillator (LO) output. If the interface between mixer and PLL is well defined, there will be no problems with poor sensitivity of the PLL or a weak output signal of the oscillator. Some mixer-ICs have no LO output2. They were designed mainly for voltage synthesis tuners. Of course it is possible to apply these kinds of components. The chapter No LO Output" will show how to connect these ICs to PLL circuits. Frequency Tuning Range TV tuners differ in the required oscillator tuning range. Problems may arise if the tuning range of an oscillator is too wide. Therefore, some ICs have three mixers and three oscillators. As a result, better performance is possible compared to the 2-oscillator types, but costs for the periphery are higher. C2 L2 C4 + _ C3 MX-I/P C1 L1 Figure 7. Mutual coupling Influence of the Supply Voltage Most TEMIC TV mixers are now available with two different supply voltages (12 V and 9 V). This possibility simplifies the production of tuner types for two supply voltages and makes customer demands easier to fulfill. Some differences, however, have to be kept in mind: * * * The higher supply voltage gives a better largesignal performance The coupling capacitors at the oscillators have to be adjusted slightly The lower power dissipation of 9-V types allows smaller IC packages Figure 7 shows the first method. The mixer input is coupled to the bandpass filter by means of coil L2, which is located near coil L1 of the secondary part of the filter. In reality, the bandpass filter looks more complex. The load of the filter is adjusted by the ratio of the windings and the distance between the coils. C2 and C3 serve for DC blocking. The transformer may be extended to a resonant type by adding a suited capacitor C4. L3 C1 L1 L2 L4 C2 + _ C3 MX-I/P Examples of Mixer Applications The following sub-chapters contain only some of the important topics. For the overall circuitries of the specific mixers, see the appropriate IC- or tuner data sheets. Figure 8. Inductive transformation Figure 8 shows the more complex method. Again, L1 and C1 represent the secondary part of the bandpass filter. C1 is connected to ground by L2. L3 and L4 perform the transformation of the mixer's low input impedance to the resonant circuit. At the same time, they are mutually coupled to achieve a symmetrical signal at the mixer input. The orientation of the coils is indicated by points. Connection to the Bandpass Filter As explained in the chapter The Different Mixer Circuitries", there are two different types of mixer inputs. The common-emitter type is very easy to handle because usually only one input is connected to the bandpass filter via a fixed capacitor. The other input pin of the mixer is RF-grounded by means of a second capacitor. So there is no need for a symmetrical input Issue: 12. 95 The Different Oscillator Circuits Several types of oscillators are used for the different applications. All TEMIC mixers have an asymmetrical 2-pin oscillator for the lowband- and symmetrical 4-pin 5 ANT017 oscillators for the higher frequencies. Four types of external circuits are recommended, depending on the count of mixers plus oscillators and on the frequency band. The frequency span of each one is mainly limited by the external components as all oscillators include broadband amplifiers. The following figures show extracts from the data sheets of the examples mentioned. Please refer to these for complete information about the recommended circuitry. * * TELEFUNKEN Semiconductors This is the whole VHF range including the Hyperband. Three problems arise with this concept: The switching diode adds losses to the resonant circuit The padding capacitor in series with the varicap has to be very large, and thus the varicap adds losses to the resonant circuit In an oscillator with fixed feedback, there is only one frequency with an optimum feedback condition. * 1 1p R 18 2p7 BB620 The internal circuit of the IC is the same as in the example above. The above mentioned problems can be minimized by adding a tuned feedback (BB515 plus 18-k resistor) to the circuit. Moreover, the tuning span is increased significantly. 5 9 2p2 2p7 L1 82 p 18 k 10 n VT 18 k BB619 18 k VT Figure 11. Simple 4-pin oscillator Figure 11 shows the external circuitry for the Hyperband oscillator, e.g., that of the U2300B. Pins 4 plus 7 are the inputs and pins 5 plus 6 the outputs of the internal symmetrical amplifier. Pin 4 is in phase with pin 5. The range is about 230 - 500 MHz. A symmetrical oscillator improves the performance of the mixer and reduces radiation problems. If the tuning span is limited to a factor of around 2 and the maximum frequency is below 700 MHz, there is no need for additional components to extend the range. The circuit shown in figure 12 is used for all UHF oscillators. Again, the example is the U2300B. Compared to figure 11, three components were added. L4 and the 100-pF capacitor increase the possible tuning range significantly. The 2k2-resistor suppresses possible subharmonic oscillations of the extended circuitry. The proper value of the resistor has to be fixed for a certain design. If the value is too small, losses are again added to the circuit. At frequencies above 700 MHz, the transit time through the oscillator amplifier can not be neglected. From outside the IC this seems to be a capacitive load which increases with the frequency. One way to decrease this 2p2 2p7 L2 68 p Figure 9. Simple 2-pin oscillator Figure 9 shows the circuitry for the first oscillator type, e.g., band A of the U2300B. As this IC contains three mixers plus oscillators, the frequency range is limited to about 80 - 230 MHz. Pin 1 is the input and pin 3 the output of an IC-internal amplifier. Output and input are in phase. The resistor R with a value of 18 serves to avoid possible parasitic oscillations at frequencies around 1 GHz. 1 Bd. I/III 1k5 2p2 2p2 BB515 L1 BA 282 L2 18 k BB619 18 k 820 p 68 p VT Figure 10. 2-pin oscillator with tuned feedback The circuitry shown in figure 10 is recommended for VHF oscillators with switching diodes like the BA282. An example is the U2320B, where one oscillator covers the ranges of about 80 - 230 MHz plus 230 - 500 MHz. 6 Issue: 12. 95 TELEFUNKEN Semiconductors effect is to reduce the size of the coupling capacitors between the IC and external circuit. This, however, leads to problems at the low end of the oscillator. The extension described above is the best compromise to solve the problem mentioned. 25 5 1p0 1p5 L3 2k2 L4 21 9 1p0 1p5 17 13 ANT017 No LO Output LO R1 C1 UHF C2 R2 + _ RF-I/P of PLL VHF 18 k Figure 13. Mixer without LO-O/P plus PLL Some types of mixer ICs have no direct LO output to connect a PLL. This is not, however, a major problem if a corresponding PLL circuit is applied. TEMIC PLLs are very sensitive and can therefore be used easily. Figure 13 shows the principle circuitry. At the sides of the oscillator's resonant circuits there is enough electromagnetic field strength to induce a sufficient voltage in a short wire or resistor. So the PLL gets its inputs from two different sources (VHF and UHF). While only one input is active, the other is decoupled to ground by the capacitor and the resistor. The value of the resistors is about 50 . The capacitors should be around 10 pF to form a high-pass filter together with the input impedance of the PLL. This prevents IF signals from disturbing the input. The overall sensitivity of the PLL is not reduced significantly. 100 p 8p2 18 k BB515 VT Figure 12. 4-pin oscillator with extended range Some typical data of the varicaps used above can be found in table 3. Table 3. Typical data of the varicaps Type BB620 BB619 BB515 C@1V 70 pF 39 pF 19 pF C1 / C28 22 15 9 Rs / 1.3 0.6 0.5 Issue: 12. 95 7 ANT017 PLLs for a TV Tuner Overview Phase-Locked Loop (PLL) circuits are the best choice to stabilize an oscillator on different frequencies with a certain step size. TEMIC produces a large variety of these types of circuits. They differ in the following features: * * * * * * * Application in TV, satellite TV, telecom Similarity to European and Japanese competitors Frequency range up to 1 GHz, 2.9 GHz and more Pin count from 14 to 20 Packages DIP, SDIP, SO, and SSO Bus is I2C, 3-wire or UNIVERSAL bus PLL self-oscillating3 or not * * TELEFUNKEN Semiconductors Controlling the PLL As mentioned before, there are mainly two types of bus systems. Independent from the PLL used, the development engineer needs a flexible tool to program the PLL. The best choice is a PC with a small interface connected to a parallel port. A suitable program4 can control all necessary features of the PLL. These are not only the divider ratios, band switches and different currents of the phase detector, but also the test mode of the PLL. This test mode is described in the individual data sheets. The following actions can be started by setting certain bits in the control words: * Connecting the output of the main divider to a band switch Connecting the output of the reference divider to a band switch Inhibiting the output of the amplifier (OS bit) The UNIVERSAL bus is a new development by TEMIC. `Universal' means that the circuit automatically detects whether it is connected to an I2C- or a 3-wire bus. This feature simplifies the production of tuners for both bus systems. Table 4 gives an overview of the PLL families used in TV tuners for analog transmission systems and SAT TV. Table 4. Recommended PLLs Type Package(s) Bus Self-osc. VS IS Application U63xxB U620xB U621xB U622xB (S)DIP20 SO20L 3-wire Yes 5V 65 mA TV SO14 SO16 I2C 5V 55 mA TV SO16 UNIV. 5V 35 mA TV SO16 UNIV. Yes 5V 25 mA SAT TV With full control over the PLL IC, possible problems can easily be detected. To check the connection between the PC program and the PLL, a band switch can be activated and switched off again. Some band switch outputs are of the opencollector type and a resistor should therefore be connected to the supply voltage. To check the correct function of the reference divider, look at the appropriate band switch. The desired reference frequency should be measured. The main divider function is checked at another band switch output. It must be kept in mind that the waveform is not symmetrical. To check the programming at a certain frequency, connect an external signal source to the input instead of the LO output. If the frequency of that source is lower than the programmed frequency, the tuning voltage quickly changes to its highest value (e.g. about 30 V) and vice versa. Yes/ no Yes/ no Digital transmission systems were introduced in the USA in 1994 (DSS via satellite) and will be introduced in Europe in 1995 (DVB). The demands concerning phase noise of the oscillators used in such systems are higher than in analog systems. Other types of PLLs are therefore necessary for digital application. Some telecom types by TEMIC are well-suited for digital systems. Special concepts for DSS / DVB are under development. The following chapters will not give an introduction to the PLL principle. The necessary literature is given in the appendix. 8 Application Hints The Loop Filter Most of the necessary parts forming the frequency control loop are implemented in the PLL IC. The only additional external components are an NPN transistor to handle the 33-V tuning voltage source and a filter consisting of one resistor, R1, and two capacitors, C1/ C2 (see figure 14). Together with the VCO, a "type 2 thirdorder loop" is formed5. Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 33 V loop. One part of it is the gain constant K. The VCO tuning steepness and the current of the phase detector contribute to it. The low-pass frequency, 1, is part of the overall low-pass characteristic of the loop, while the high-pass frequency, 2, mainly serves for the stability of the loop (the so-called phase margin). The second low-pass, 3, improves suppression of the reference frequency. VS C1 C2 R1 VT Damping Factor and Loop Frequency PLL IC One way to describe the control loop is by using a function which includes the poles and zeros mentioned above. Another way is by using a function which has been normalized to a form that includes two terms * * Natural frequency, n Damping factor, D, or the phase margin Figure 14. A typical loop filter This consists of two integrators, one being the VCO and the second the filter with the three time constants 1 = R2 x C1 2 = R1 x ( C1 + C2 ) 3 = R1 x C2, where = 1 / and 3 > 2 > 1. R26 is not included in figure 14, it can be calculated from the data sheet. The current ICP of the pump has to be translated to its equivalent voltage source. Therefore, an approximation is R2 = ( VS / 2 ) / ICP For a current of 180 A, for example, R2 can be calculated as 13.9 k. As a result, the designer has some independence to influence the loop performance which can be described by the open loop gain. Unfortunately, this gain can not be measured because of the integrating amplifier. Other methods to characterize the loop have to be utilized, e.g. the step response7. There are some programs for the CAD8 of a PLL loop. An easy way to develop a PLL-controlled tuner is to take the necessary component values from the appropriate data sheet. This is, however, only a proposal. The result may be influenced by quite a different tuning steepness9 of the oscillator or by additional low-pass filters, placed between PLL and the varicap diode of the VCO. The following is necessary to check and optimize a system: * * Measurement of the performance Knowledge of what to change (pole) (zero) (pole) The damping factor is used and can be calculated up to functions of the second order. For higher orders like the example above, the term phase margin" is common, but the damping factor is easier to comprehend. The damping factor describes how the loop will reach its final value. A value of 1 means an exponential approach without ringing. A value < 0.7 means faster lock-in, but ringing with a frequency of about n and an exponential decreasing amplitude. Therefore, n describes the speed of the phase lock loop plus the ability of the loop to suppress interference and disturbances. For this effect, the loop can be seen as a high-pass filter with a cut-off frequency of n. On the other side there has to be a low-pass filter in the loop to suppress or smooth the pulses of the phase detector (e.g. 7.8125 kHz). As a compromise, n should be around 300 Hz for the example above. All variable parameters of the loop influence both the damping factor and the natural frequency. An exception is the cut-off frequency, 3, which mainly influences the suppression of the reference frequency. Dependent on the possibilities given by the software to control the PLL, the large variation of the VCO's tuning steepness has to be kept in mind when optimizing or testing the performance10 of the PLL tuner. A damping factor from 0.3 to 0.6 seems to be the optimum. A rough formula is given in the literature11 for a second-order loop: n = K VCO x I CP N x C1 x As mentioned above, the open loop gain, which is a complex function, describes the performance of the D = 0.5 x n R1 x C1 Issue: 12. 95 9 ANT017 where C2 of the loop filter is neglected, N is the overall division ratio, KVCO (in MHz/V) is the tuning steepness of the LO and ICP is the current of the phase detector pump. * TELEFUNKEN Semiconductors For I2C, a series resistor of about 270 should be used at SDA and SCL. Better performance is achieved by a T type filter with 2 x 150 plus a capacitor of 100 pF from center to ground. Using higher values for the resistors, problems will arise with regard to the acknowledged feature of the bus. Unused band switches may be connected together with a pull-up resistor to VS and a blocking capacitor to ground. They should be programmed to the high impedance state. The programming wires may influence the VCO and harmonics of the crystal oscillator may disturb the IF part of the tuner. So keep them at a distance. Hold the bus in an active mode only when a change is necessary. PLLs are often programmed at very short intervals. Avoiding Disturbances Bus systems in general have more or less problems with crosstalk caused by the activity on the bus with its very fast digital signals of 5 V amplitude. TEMIC PLLs have been developed to minimize noise from within the IC. So the main problem is the layout of the customer application. The following points should be observed: * * Shortest possible connection between the interface and the programming pins of the IC Good ground connection for the IC * * * 10 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 * They have to be protected against short circuits (All leads of the tuner that carry the supply voltage are exposed to the danger of being shorted during measurements and alignment) In addition to the problems mentioned above, PNPs are not only unnecessary but also inconvenient for a tuner with MOSMICs The New EasyLink Concept Definition EasyLink is a new concept for TEMIC PLLs. Customerspecific modified standard PLLs support the tuner developer and manufacturer by the following features: * * * * * Easy connection between PLL, MOSMIC preamplifier and mixer Full support of the MOSMIC benefits including G1 switch-off Correct band switching of the mixer used by the customer Full software compatibility Minimizing possible problems G1 * To obtain the best performance, MOSMIC preamplifiers should be switched off12 at Gate 1. The mixer has a tristate band switch input and needs three different voltages. So the simplified circuitry in figure 15 shows the "EasyLink" of all components. Compared to the traditional approach, only few external components are necessary. AGC G2 S G2 D 10 k VS D VHF LOW Examples The following examples show the principle of EasyLink. Solutions generally have to be found in cooperation with the customer to meet his demands. 10 k G1 S G2 VHF HIGH D 0V 2V 4V f(in) Band switch 3-Mixer IC and MOSMICs This example shows the full benefit of EasyLink. A PLL shall control: * * A mixer IC with three mixers and oscillators (e.g., U2300B) Three MOSMIC preamplifiers G1 10 k S LO-O/P U2300B UHF MOSMICs EasyLink PLL Figure 15. Example for an EasyLink There is an obvious problem in this case, however. In a conventional concept, an active band switch activates the appropriate preamplifier. The mixer is switched by means of a small network consisting of diodes and resistors. The MOSMIC preamplifier is switched off via G1 by an active band switch. The concept of figure 15, together with a standard PLL, would no longer be software-compatible to prior tuners. There is no solution as to how the MOSMICs and the mixer can be switched off by a simple external logic. Therefore, the easiest way to solve this problem is to use the EasyLink. TEMIC can make the minor modifications in the PLL's logic on a customer-specific basis. The software remains unchanged. First, a short overview is given about a special feature of today's PLLs. There are two types of band switches, one with NPN- and one with PNP transistors. The traditional method for band switching is switching off the supply voltage. Therefore, external PNP transistors have to be added to the PLL type with NPN switches. This need for external components led to the development of PLL circuits with PNPs. Using internal PNPs for the band switch, however, has several disadvantages: * * * The necessity for an additional pin in the PLL for the supply voltage, e.g., of 12 V Integrated PNPs need a lot of space on the chip, thus increasing the price of the component They need a lot of current, because their DC current gain factor is very low Non-Self-Oscillating PLL This is an example for reducing possible problems in the tuner. One weak point of the oscillators is their behavior13 at low tuning voltages, where the quality factor of the external resonant circuit is low. There are two possibilities: 11 Issue: 12. 95 ANT017 * * The oscillation stops A parasitic oscillation starts at a very high frequency * TELEFUNKEN Semiconductors If the PLL is of the self-oscillating type, it is fooled" by this effect. The input frequency seems to be too high, and the tuning voltage decreases to its minimum value and will remain there. Changing the channel without an additional band change will have no effect; the tuner is blocked. If the PLL is of the non-self-oscillating type, the input frequency seems to be too low (i.e., zero). The tuning voltage therefore rises to a higher value and the oscillation will start again. The voltage may decrease again and the oscillation may stop. The cycle mentioned above restarts - changing the channel will nevertheless be possible. The oscillators of TEMIC mixers are developed to avoid parasitic oscillation. Most PLLs and prescalers are self-oscillating if the input amplitude is too low. This is an inherent feature of this type of circuits. It is not possible to decide whether there is a valid input signal or not. The virtual input frequency seems to be in the upper part of the normal operating range. TEMIC has long experience in producing prescalers with a modified circuitry. These devices don not selfoscillate in the absence of an input signal. This principle can be transferred to PLL circuits. There are therefore two possibilities if an oscillator has stopped at a low tuning voltage, depending on the associated PLL type: * As the improved non-self-oscillating PLL has the same features as the oscillating PLL, it can easily replace the standard type if useful. 12 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 Table 5. Calculation of the equivalent resistor VG / dB 0 -1 -2 -3 -4 -5 Rp / 0 12.2 25.9 41.3 58.5 77.8 99.5 123.9 151.2 181.8 216.2 Rs / Infinity 204.9 96.6 60.6 42.7 32.1 25.1 20.2 16.5 13.7 11.6 VG / dB -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 Rp / 254.8 298.1 346.7 401.2 462.3 531.0 607.9 694.3 791.3 900.0 1022.0 Rs / 9.8 8.4 7.2 6.2 5.4 4.7 4.1 3.6 3.2 2.8 2.4 Appendix This appendix contains a description of measurement procedures to assist application designers. The measurement results have been used in previous chapters which include references to topics in this chapter. Wherever possible, a simple gear was used for the measurements. Measurement of Tuner Parameters Quality Factor of Resonant Circuits DUT TX RX -6 -7 -8 Figure 16. Cable for Q measurement -9 -10 C C Rp L RS L This calculation is not necessary for some applications. Here, only the value of the equivalent resistor is important and not the quality factor of the resonant circuit. In many cases, the values of C and L are also unknown. Determining the C value by a short experiment is easy. A small capacitor Cx (of a known value) is simply connected in parallel with the unknown C and the change of the resonant frequency from f1 to f2. is controlled. C can now be calculated as: C= Cx f1 f2 2 Figure 17 Measuring Q factors The necessary equipment includes a swept signal generator and a receiver which may include a broadband detector (e.g. the Polyskop by ROHDE & SCHWARZ). A specially assembled temperature-resistant coax cable of the same impedance as the generator source is very useful. Figure 16 shows how the cable is assembled. The measurement system is calibrated by connecting the two inner conductors. This is equivalent to an Rp of zero or an Rs of infinity (see figure 17 and table 5). The DUT is then connected to the cable as shown in figure 17, depending on whether it is a parallel or series resonant circuit. At the resonant frequency, the reactance of C and L realizes compensation and the voltage at the receiver is at a minimum referred to the calibration performed earlier. The remaining circuit consists of a voltage divider with three resistors. Table 514 shows which equivalent parallel resistor Rp or series resistor Rs causes the measured voltage gain (attenuation), if the system impedance is 50 . With a known capacitance or inductance value, the quality factor can now be calculated. -1 It can be seen from table 5 that the described method is very sensitive for a small Rs and a large Rp. The series resistance of tuning diodes can thus be measured by adding a high Q inductor and using the series resonant method. For more complex circuits such as crystals, the use of a CAD tool15 is recommended to compare the measurement with the simulated equivalent circuit. Voltage Levels and Load Impedance Measurements of the Voltage Gain (VG) of different tuner stages are required to verify figures in the data sheet or to collect data for a level diagram16. The load Issue: 12. 95 13 ANT017 impedance must also be known for the calculation of Power Gain (PG) . The VG cannot be determined very exactly as the RF probe tip used may influence the result by loading and/ or de-tuning the test point. This possible failure can be reduced by using the following method: The gain is measured by means of a tuned receiver (e.g., spectrum analyzer). A second receiver (e.g., broadband) is connected to the IF output of the tuner and monitors the change of amplitude when the probe tip is connected to the test point. This difference is subtracted from the result of the tuned receiver. The data sheets of the semiconductors used can be consulted to obtain the load impedance, Rp, at a certain point of the tuner. The most practical method again uses the receiver at the IF output. An additional resistive load, Rx, is connected in parallel with the point of interest. The value of this load is changed until the measured output voltage is one half of the voltage without load . Rx is then equal to Rp, the resistive part of the unknown impedance. WARNING: this method is valid only, if the resistance of the load is smaller than the output resistance17 of the preceding stage. TELEFUNKEN Semiconductors Level Diagram of a Tuner The level diagram is a powerful tool for tuner development. If computer programs like Microsoft Excel are used, it is possible to simulate a kind of virtual tuner in order to show the influence of the different stages and how they contribute to noise and other effects. The spreadsheets shown in table 6and table 7 are limited to noise examination. In table 6, the columns and rows are labeled to simplify the following explanation. First of all, an explanation is needed for the data which has to be entered into the level diagram: Row 1 shows the bandwidth used (5 MHz). The different stages are marked and named; for example, the preamplifier is column C. The voltage gains (row 7) and noise figures (row 9) of the different stages can be measured or taken from the data sheets. The impedance (row 3) between the stages is also required. The voltage in field B4 (voltage at the antenna jacket, e.g., 2.5 mV/ rms) is set to that value, as from which the IF circuit shall start reducing the gain of the preamplifier. The rest of the data is calculated by means of fundamental equations. These are: * * * * * * The power at the inputs of all stages (row 5) The power gain of all stages (row 8) The cascaded power gain (row 11) Several noise parameters (rows 12, 14, 15) The noise figure from the antenna to this point (row 16) A so-called quality factor (row 17) Cascaded Noise and Intermodulation When a tuner design is complete, it is necessary to determine the weak points concerning noise and intermodulation distortions. From the antenna to the IF output, there are several stages which contribute to these unwanted effects. Formulas describe the behavior of cascaded stages with regard to noise18 and InterModulation (IM). As some passive components produce IM also, a measurement is suited to support and improve the design. The test set-up for noise figures or IM19 of the third (IM3) or second (IM2) order is used for the measurement. It is also possible to use a selective receiver (e.g., spectrum analyzer) for both measurements, thus replacing the noise figure meter. It will be necessary to connect the measurement equipment to multiple points in the tuner. By connecting a resistive load of an appropriate value in parallel with the output of a certain stage, the overall gain is reduced by several dB. If noise figure or IM remains at the same level, the following stages up to the test point do not contribute to it significantly. By repeating this method with the outputs of every stage, those parts of the tuner can be determined where an improvement is most effective. The results of the noise measurement can also be compared to the level diagram to verify its input data. The meaning of the quality factor is explained by an example. The value of 0.44 dB per dB in field D17 means that the cascaded noise figure increases by 0.44 dB in the following stage (F16) if: * or * The noise figure of the following stage (E9) is increased by 1 dB The power gain of the preceding stage (C8) is reduced by 1 dB Interfaces with high values for the quality factor (e.g., columns D and J) indicate that their two associated stages (preceding and following) are sensitive related to noise. The IF circuit is partly included because it may also increase the noise figure or Signal-to-Noise ratio (S/N). Its noise figure is calculated from data included in the data sheet. 14 Issue: 12. 95 TELEFUNKEN Semiconductors Table 6. Level diagram U2300B VHF-I/P 1 2 3 4 5 7 8 9 11 12 14 15 16 17 A System settings: B C D Bandwidth = 5 E + 06 Preamplifier 500 22.3 -30.0 19.0 10.8 3.0 10.8 -174.0 -107.0 66.2 -160.2 -93.2 63.2 3.00 0.44 9.0 9.0 12.0 19.8 -149.1 -82.1 61.1 5.11 0.44 E F G H I ANT017 J K L U2300B Impedance/ Signal voltage/ mV (rms) Signal power/ dBm Voltage gain/ dB Power gain/ dB Noise figure/ dB Cascaded power gain/ dB Noise level/ dBm (1 Hz) Noise level/ dBm S/N/ dB Cascaded noise figure/ dB Quality factor dB/ dB 75 2.5 -40.8 + SAW driver 500 1000 62.8 -21.0 24.0 21.0 10.0 40.8 -128.0 -61.0 61.0 5.23 0.33 995.3 0.0 SAW filter IF circuit 1000 1000 31.5 -30.0 -30.0 -30.0 30.0 10.8 -157.9 -90.9 60.9 5.34 0.42 0.0 0.0 14.0 10.8 -155.9 -88.9 58.9 7.36 31.5 -30.0 Table 7. Level diagram U2300B Hyperband I/P 1 2 3 4 5 7 8 9 11 12 14 15 16 17 A System settings: B C D Bandwidth = 5 E + 06 Preamplifier 30 5.6 -29.8 7.0 11.0 3.0 11.0 -160.0 -93.0 63.2 3.00 0.43 21.0 8.8 12.0 19.8 -149.2 -82.2 61.2 5.02 0.04 E F G H I J K L U2300B 75 Impedance/ Signal voltage/ 2.5 mV (rms) Signal power/dBm -40.8 Voltage gain/ dB Power gain/ dB Noise figure/ dB Cascaded power gain/ dB Noise level/ dBm -174.0 (1 Hz) Noise level/ dBm -107.0 S/N/ dB 66.2 Cascaded noise figure/ dB Quality factor dB/ dB + SAW driver 500 1000 62.8 -21.0 24.0 21.0 10.0 40.8 -128.1 -61.1 61.1 5.15 0.03 995.3 0.0 SAW filter IF circuit 1000 1000 31.5 -30.0 -30.0 -30.0 30.0 10.8 -157.9 -90.9 60.9 5.34 0.42 0.0 0.0 14.0 10.8 -155.9 -88.9 58.9 7.36 31.5 -30.0 Issue: 12. 95 15 ANT017 Table 6 shows the level diagram for the VHF part of the U2300B with an asymmetrical common-emitter input. Table 6 shows the level diagram for the Hyperband part with a symmetrical common-base input. The differences between the input characteristics are explained in the chapter The Different Mixer Circuitries". Both tuner branches have the same overall power gain of 10.8 dB (from the input to the SAW-filter output J11). Everything seems to be very similar. But there is a big difference at the interface between the preamplifier and the mixer. The input impedance (D3) of the Hyperband mixer is much lower. The voltage across the tuning diodes in the band-pass filter, which connects the mixer to the preamplifier, is therefore about 12 dB lower. Varicap diodes produce intermodulation because of their non-linear behavior. This negative effect is significantly reduced by the solution described in table 7. The level diagram is a powerful tool for development. Several virtual tuners may be compared. The optimum gain values for the single stages can be optimized for * * Best performance concerning noise and intermodulation Reduced sensitivity to tolerances in production * * TELEFUNKEN Semiconductors A programmable voltage source A programmable frequency counter If the mixer/ oscillator used has an LO output, the counter can be connected to it. If this possibility is not given, a small probe should be placed near the oscillator under test. This probe may be realized in the form of a short piece of wire or a 50- resistor at the end of a coax cable. To increase the sensitivity of the counter or to extent its frequency range, an additional frequency divider (prescaler) connected at the counter input is very useful. The first step is to check the DUT. It must be ensured that harmonics or weak signals from the oscillator do not influence the test. If the tuner is PLL-controlled, the amplifier of the PLL circuit should be disabled20 by the appropriate bus command in order to avoid conflicts with the external tuning voltage. Measurement now takes place. For all frequency bands, the tuning voltage is increased from the minimum value (e.g., 0 V) stepwise to the maximum value (e.g., 30 V), the oscillator frequency is measured and stored in the memory of the computer at each step. All stored values are plotted to display the results. Although the tuning voltage was the independent variable, it is better to plot the tuning voltage versus the oscillator frequency. A sample plot (dotted line) is shown in figure 18 in which the left vertical axis is the tuning voltage in volts. Measurement of Mixer Parameters Tuning Steepness of the VCO The tuning steepness is an essential factor in tuner development. It can be defined as the change of the oscillator frequency in relation to a change of the tuning voltage. The values are given in kHz/ mV or MHz/ V. Only the curve is of interest for a voltage-synthesized or simply voltage-controlled tuner. Larger non-steady changes or negative values indicate problems with the oscillator : * * Frequency drift versus temperature AFC operation VT / V df osc / dVT For a PLL-controlled tuner, the absolute values are also of interest because they determine the stability and the lock-in time of the loop. The results of the measurement method described are also used in the chapter Loop Constants and Settling Time". Measurement should be performed under computer control. Up to 301 points are required for each frequency band, e.g. points at intervals of 100 mV in the tuning-voltage range from 0 V to 30 V. Therefore, the necessary equipment consists of * 16 A computer with a suitable program f osc / MHz Figure 18. Tuning steepness To calculate the tuning steepness from the stored values, a difference quotient of neighboring points is plotted against their associated frequency. The steady line shows the result with the right vertical axis being assigned unit kHz/ mV or MHz/ V. The large variation Issue: 12. 95 TELEFUNKEN Semiconductors of the steepness, ranging from about 1 kHz/ mV to about 40 kHz/ mV at the lower end of the UHF is remarkable. The example above shows the tuning parameters of a DUT equipped with a U2321B. The full frequency range from 48 to 860 MHz is covered in three bands but with only two oscillators. The VHF branch is switched to the second range by means of switching diodes (see also the chapter Quality Factor of Oscillator Circuits"). It is worth mentioning the large variation of the tuning steepness, especially at the edge of the bands. Problems may arise concerning the stability of a PLL (see the chapter Loop Constants and Settling Time") or AFC performance. ANT017 current is limited by the resistors which decouple the diodes. The negative voltage is increased until the oscillation stops or its amplitude falls below a certain level. The value at this point is the quality figure of the oscillator. The ambient temperature also influences the stability of the oscillation. Instead of heating up the tuner, a correlated measurement can be performed with the method described above. Measurement of PLL Parameters It is not possible to determine all parameters for optimization of the PLL from the data sheets or CAD simulations. Thus, the only solution is a measurement. Quality Factor of Oscillator Circuits This chapter describes a method on how to qualify the whole oscillator circuit in the active state. In the chapter Quality Factor of Resonant Circuits", only the quality factor of a single resonant circuit was estimated. This method, however, is not suited for measurement in an active circuit. The quality of an oscillator includes the Q of the resonant circuit as well as the stability of the oscillation. This stability is mainly influenced by losses in the peripheral components which reduce the gain. Besides other effects (like lossy coils) in nearly all components, there are two main factors which contribute to the losses: * * Tuning diodes Switching diodes Loop Constants and Settling Time A loop has to be fast but stable. The best way to check a design is to measure the overall parameters of the loop. This is best done by controlling the step response21 of the loop. The PLL is therefore programmed to hop between two frequencies, perhaps including a band change. A simple method is to measure the tuning-voltage response directly with an oscilloscope. As the tuning steepness22 of the VCO is very high (up to 40 kHz/ mV), the resolution will be poor. Moreover, there is no direct readout for the frequency offset. A better way is to use a spectrum analyzer. This instrument is very versatile. It can measure: * * * The spectrum of a signal in its standard mode Pulses, when switched to a large bandwidth Amplitude modulation, when switched to a large bandwidth and the zero-scan mode, tuned to the peak and thus suppressing frequency modulation Frequency modulation in the absence of amplitude modulation when switched to a suited bandwidth in the zero-span mode and tuned to the slope of the filter The equivalent circuit of a varicap mainly consists of a voltage-variable capacitor in series with a small resistor Rs of less than 1 . This resistor is changed from the series type to a parallel-connected resistor to achieve an equivalent circuit of the parallel resonant type. The appropriate Rp depends on the value of the effective capacitance, Cs, in series with Rs, which consists of the voltage-dependent part of the varicap and a commonly used padding capacitor. The value of Rp decreases when Cs increases, i.e. at low tuning voltages. The weak point of an oscillator is therefore its behavior at low VT, especially around 0 V. A switching diode also contributes to losses because parts of the coils are imperfectly shorted. To realize an in-circuit method to qualify a stable oscillation, it is only necessary to add losses to the resonant circuit in a controlled manner. This can be done by applying a small negative voltage across the tuning diodes. The diodes thus start conducting while the Issue: 12. 95 * In the zero-span mode, the spectrum analyzer acts as a receiver at a fixed frequency. Along the slope of the IF filter, a frequency deviation or modulation is converted to a change of amplitude. The filter used needs to be calibrated only once. If the PLL is hopping between the frequencies f1/ f2, where f2 > f1, the spectrum analyzer should be tuned to > f2 or < f1. This ensures that the analyzer is not influ17 ANT017 enced by the VCO frequency crossing the top of its IF filter. If the controller for programming the PLL is able to produce a trigger signal after transmission of the last byte, the spectrum analyzer can be triggered at that time and an exact measurement of the overall settling time is possible. Figure 19 shows an example for the measurement described. It is performed without a trigger and thus the settling time cannot be determined. The LO hops between 600 and 601 MHz. Calibration of the vertical axis is therefore very easy. It is 1000 kHz/ 4.5 divisions, i.e. 222 kHz per division. The center frequency of the spectrum analyzer is tuned to around 596 MHz. Thus, the higher amplitude is caused "by the 600MHz". TELEFUNKEN Semiconductors Sensitivity Some problems seem to stem from insufficient sensitivity of the PLL. Measurement of the input sensitivity versus the input frequency should be performed in a special test fixture. The main divider of the PLL is programmed to a suitable value Thus, it is able to count its output in the test mode. Typical curves and the guaranteed limits are included in the data sheets. The following has to be kept in mind: * * The input voltage should always lie between the guaranteed minimum and maximum values When comparing the curves of an oscillating and a non-oscillating PLL, there is distinct sensitivity around the resonant frequency. Nevertheless, these devices are not sensitive to harmonics of input signals on subharmonic frequencies. Both PLL types behave similar. In order to avoid problems, the first harmonic of the input signal should be below -10 dBc for low input frequencies. A higher harmonic content is possible even for higher frequencies. Figure 19. Measurement of the step response Six msec. after the start of the jump, the frequency crosses the final frequency for the first time. Three overshoots follow, the first having an offset of 600 kHz. The fourth peak is less than 50 kHz of the final value. The loop needs 56 msec. up to this point The frequency of the oscillation is about 32 Hz or 201 rad/sec. The calculation formulas23 give the results below: * * Damping factor D = 0.33 Natural frequency, n, = 213 rad/sec To perform a quick check of the tuner, the PLL is programmed to a suitable main counter value N with the OS bit activated, thus disabling the amplifier output. The appropriate band switch has to be activated for each band to be checked, The VCO is tuned by means of the voltage at the 33-V pin which now is directly applied to the varicaps. It is convenient to use a spectrum analyzer with an RF probe connected to the special band switch to which the main counter output is sent in the test mode. Setting the sweep of the spectrum analyzer from 0 to 1000 MHz divided by N gives a quasi-direct readout possibility. As the output of the main counter is a square wave (duty cycle <> 50%), many harmonics appear on the spectrum analyzer screen. The best criterion for checking a PLL circuit having a sufficient input signal is displaying the output signal on a spectrum analyzer with a small frequency span. The PLL will add noise sidebands to the signal if the input voltage is just above the limit of operation. As the frequency remains the same, a counter cannot check this limit. This example is therefore good with regard to the damping factor24, but too slow in the case of n. 18 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 Utilities Literature Books about PLLs: Best, Roland E.: Phase-locked loops. Theory, design and applications. 2nd ed., McGraw-Hill, 1993. Rohde, Ulrich L.: Digital PLL frequency synthesizers. Theory and Design. Prentice-Hall, Englewood Cliffs, N.J., 1983. Gardner, Floyd M.: Phaselock Techniques. 2nd ed., John Wiley & Sons, New York, 1979. Application notes by TEMIC: Measurement of non-linear distortions with the spectrum analyzer, using the example of cross-modulation and intermodulation in television tuners (ANT004) TV tuner basics (In preparation) Satellite tuner basics (In preparation) [2] [1] CAD Tools for PCs Programs for designing and evaluating PLLs: SIMUL. R_PLL PLLSYN Contained on a disk in [1]. Program for designing PLLs. Listing contained in [2] on page 453. Designing a 5th-order PLL. From the RF Design magazine, Software Service (Disk RFD-0793). (DOS) (DOS) (DOS) (DOS / Windows) Several programs by TEMIC for controlling a PLL (LPT1 of the PC). General simulation tools: PSpice By MicroSim. Demo versions are available for DOS and Windows. They can handle only small circuits. However, this is sufficient for some purposes. Mathcad Excel By MathSoft. Program for solving mathematical problems. By Microsoft. Spreadsheet program for handling formulas. Several spreadsheets, including the described level diagram, are available from TEMIC. All programs and spreadsheets by TEMIC are available on request. Issue: 12. 95 19 ANT017 List of Abbreviations and Expressions Used AFC AGC D dBc DIP DUT EasyLink G1 ICP IF IM2 IM3 IS K LO MOSMICTM N OS PC PG Q Rp Rs RX S/N SAT SAW SDIP SO SSO TX U2300B U2321B UNIVERSAL VCO VG VS VT n Automatic Frequency Control Automatic Gain Control TELEFUNKEN Semiconductors Damping factor of a control loop (in the literature, = zeta) dB related to a (reference) carrier Dual In-line Package (package for ICs) Device Under Test New concept by TEMIC Gate 1 of a MOSFET or a MOSMIC Current of the phase detector's pump Intermediate Frequency InterModulation of the 2nd order InterModulation of the 3rd order (two-tone method) Supply current Gain constant of a filter, phase detector or VCO Local Oscillator MOS Monolithic Integrated Circuit Divider ratio of a counter Special control bit for the PLL which inhibits amplifier output Personal Computer with an x86-compatible processor Power Gain Quality factor of a resonant circuit Equivalent Resistor in a Parallel resonant circuit Equivalent Resistor in a Series resonant circuit Receiver Signal-to-Noise ratio Satellite Surface Acoustic Wave Shrinked DIP Small Outline (package for ICs) Shrinked SO Time constant of a filter pole or zero Signal source (Transmitter) Mixer IC by TEMIC Mixer IC by TEMIC New bus for I2C and 3-wire Voltage-Controlled Oscillator Voltage Gain Supply Voltage Tuning Voltage Natural (angular) frequency in rad / sec ( 2 x f ) Natural (angular) frequency of the PLL in rad / sec 20 Issue: 12. 95 TELEFUNKEN Semiconductors ANT017 Notes 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MOSMIC is a registered trademark by TEMIC See table 2 in chapter Overview", page 8 See chapter Non-Self-Oscillating PLL" See chapter CAD Tools for PCs" See Rohde [2], page 31 See Rohde [2], page 31 See chapter Loop Constants and Settling Time" See chapter CAD Tools for PCs" See chapter Tuning Steepness of the VCO" See chapter Loop Constants and Settling Time" See Best [1], page 58 See chapter Advantages of a MOSMIC Preamplifier" See also chapter The Different Oscillator Circuits" EXCEL spreadsheet See chapter Utilities" See chapter Level Diagram of a Tuner" See chapter The SAW Driver" for an exception Implemented in chapter Level Diagram of a Tuner" See chapter Utilities" See chapter Controlling the PLL" See also chapter The Loop Filter" See chapter Tuning Steepness of the VCO" See Best [1], page 282 See chapter Damping Factor and Loop Frequency" Issue: 12. 95 21 |
Price & Availability of ANT017
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |